About

### Overview I’m building a compact motor health monitoring device for small DC motors (~0.5–2 HP). The board is an ESP32‑S3‑based edge device that measures vibration, audio, current, voltage, temperature, and RPM, and pushes data via WiFi and LoRaWAN. I’m looking for an experienced mixed‑signal PCB designer to take this from concept to a JLCPCB‑ready design (schematic + layout + fab files) and help finalize a practical external sensor BOM. No firmware development is required for this engagement. --- ### What You’ll Design 4‑layer, mixed‑signal PCB (~50×60 mm) including: * Core * ESP32‑S3‑WROOM‑1‑N8R8 (8 MB Flash, 8 MB PSRAM) * microSD for logging * USB‑C for 5 V power and programming * Communications * WiFi/BLE (ESP32‑S3 module) * LoRaWAN (SX1262/RAK3172‑class module, u.FL antenna) * On‑board sensing * 3‑axis accelerometer (sensor island, interrupted ground plane) * I2S MEMS microphone (bottom‑port, gasket keepout area) * 24‑bit ADC for load cell * External sensors / interfaces * DC Hall‑effect current sensor (3‑pin: 5 V/GND/signal) * 0–200 V DC voltage sense (motor ground may float; differential/isolation required) * NTC thermistor * Optical tachometer input * 4‑wire load cell connection to ADC * Qwiic/Stemma QT (I²C expansion) * Power * USB‑C 5 V primary input * LiPo backup (3.0–3.2 Ah, JST‑PH) * Charger + **power‑path management** (TP4056‑class or better device) * RGB status LED * Mechanical / layout * 4‑layer stack (Signal / GND / Power / Signal) * JLCPCB fabrication & assembly * Hand‑assembly friendly: 0805 passives preferred, SOIC/TSSOP over QFN where realistic * Components on one side preferred (top side), bottom only if truly needed --- ### Scope & Deliverables Core deliverables (fixed‑price): 1. Complete KiCad 8 project (schematic, PCB layout, symbol/footprint libraries) 2. JLCPCB‑ready manufacturing package: Gerbers, drill files, assembly drawings 3. Assembly data: CPL/Pick‑and‑Place, BOM with LCSC part numbers 4. Short design notes: * 4‑layer stackup choice * High‑voltage sensing & isolation approach * RF layout notes (keepouts, matching, stitching) * Sensor island / mic isolation notes 5. GPIO / interface map (clear pin‑mapping document) Can be a second milestone: * JLCPCB ordering / assembly walkthrough * External sensor **BOM**: concrete part numbers, suppliers, and notes on compatibility No firmware, no enclosure design, and no formal certification work are expected in this phase. --- ### Requirements (Must‑Have) Please don’t apply unless you can tick these: * You’ve shipped at least one 4‑layer mixed‑signal board with an ESP32 or similar RF MCU (WiFi/BLE). * You’ve designed a board that combined RF + sensitive analog (e.g., accelerometers, audio, precision ADCs). * You have prior experience with high‑voltage (≥150 V) sensing or mains‑related analog front‑ends, including creepage/clearance and isolation practices. * You use KiCad 7/8 professionally and can hand over clean, organized project files. * You’re comfortable designing for JLCPCB fabrication and assembly (DFM, LCSC parts, etc.). Nice to have (not required, but tell me if you have it): * LoRaWAN module experience (e.g., SX126x, RAK modules) * Experience with "sensor “islands” for accelerometers / MEMS mics * Designing boards meant for both hand reflow and factory assembly --- ### Budget & Timeline * Budget: ~$600–$800 for the first revision with 1–2 structured review cycles * Timeline: About 2–3 weeks to JLCPCB‑ready outputs (assuming normal availability) If, based on your experience, this scope clearly needs a different budget or timeline, propose how you’d phase the work and what you’d charge for each phase. --- ### To be considered, please: – Start your cover letter with the word “RotorIQ”. – Answer all screening questions in full. Proposals that skip them will be ignored. I’ll send a more detailed spec (PDF) to promising candidates before we finalize scope and milestones.